In the related art, there is a technique for designing connections between a plurality of printed circuit boards in electronic apparatuses such as transmission apparatuses and communication apparatuses that include a plurality of printed circuit boards connected to each other via a connector. For example, a technique for checking the validity of a signal connection path through which a signal that is output from an output pin of a driver component to an input pin of a receiver component passes, that is, the validity of connection between signal pins is disclosed in the related art.
In the case where the above-described technique of the related art is employed, connections between a plurality of printed circuit boards are designed by causing an electrical two-dimensional computer aided design (CAD) to read a definition file that defines connection information of physical pins connecting the plurality of printed circuit boards.
However, since two-dimensional CAD data of the plurality of printed circuit boards is used in the above-described technique of the related art, the definition file of the connection information of the physical pins connecting the plurality of printed circuit boards is created by manually specifying the correspondence of the physical pins. For example, a designer manually specifies which pin of the printed circuit boards is to be directly connected to which pin of the connector. When the printed circuit boards are to be connected to each other via the connector, the designer manually specifies which pin of one printed circuit board is to be indirectly connected to which pin of the other printed circuit board. Therefore, there is a problem that design of connection using the above-described technique of the related art causes the design work load of the designer to increase and the design period to be prolonged.
Japanese Laid-open Patent Publication Nos. 2001-325315, 11-66118, and 2002-288256 are examples of the related art.